To achieve the high coding efficiency the H.264/AVC standard offers, the encoding process quickly becomes computationally demanding. One of the most intensive encoding phases is motion estimation. Even modern CPUs struggle to process high-definition video sequences in real-time. While personal computers are typically equipped with powerful Graphics Processing Units (GPUs) to accelerate graphics operations, these GPUs lie dormant when encoding a video sequence. Furthermore, recent developments show more and more computer configurations come with multiple GPUs. However, no existing GPU-enabled motion estimation architectures target multiple GPUs. In addition, these architectures provide no early-out behavior nor can they enforce a specific processing order. We developed a motion search architecture, capable of executing motion estimation and partitioning for an H.264/AVC sequence entirely on the GPU using the NVIDIA CUDA (Compute Unified Device Architecture) platform. This paper describes our architecture and presents a novel job scheduling system we designed, making it possible to control the GPU in a flexible way. This job scheduling system can enforce real-time demands of the video encoder by prioritizing calculations and providing an early-out mode. Furthermore, the job scheduling system allows the use of multiple GPUs in one computer system and efficient load balancing of the motion search over these GPUs. This paper focuses on the execution speed of the novel job scheduling system on both single and multi-GPU systems. Initial results show that real-time full motion search of 720p high-definition content is possible with a 32 by 32 search window running on a system with four GPUs.
KEYWORDS: Visualization, Video acceleration, Video, Computer programming, Video coding, Video processing, Computer architecture, Motion models, Standards development, 3D modeling
The coding efficiency of the H.264/AVC standard makes the decoding process computationally demanding. This has
limited the availability of cost-effective, high-performance solutions. Modern computers are typically equipped with
powerful yet cost-effective Graphics Processing Units (GPUs) to accelerate graphics operations. These GPUs can be
addressed by means of a 3-D graphics API such as Microsoft Direct3D or OpenGL, using programmable shaders as
generic processing units for vector data. The new CUDA (Compute Unified Device Architecture) platform of NVIDIA
provides a straightforward way to address the GPU directly, without the need for a 3-D graphics API in the middle. In
CUDA, a compiler generates executable code from C code with specific modifiers that determine the execution model.
This paper first presents an own-developed H.264/AVC renderer, which is capable of executing motion compensation
(MC), reconstruction, and Color Space Conversion (CSC) entirely on the GPU. To steer the GPU, Direct3D combined
with programmable pixel and vertex shaders is used. Next, we also present a GPU-enabled decoder utilizing the new
CUDA architecture from NVIDIA. This decoder performs MC, reconstruction, and CSC on the GPU as well. Our results
compare both GPU-enabled decoders, as well as a CPU-only decoder in terms of speed, complexity, and CPU
requirements. Our measurements show that a significant speedup is possible, relative to a CPU-only solution. As an
example, real-time playback of high-definition video (1080p) was achieved with our Direct3D and CUDA-based
H.264/AVC renderers.
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