KEYWORDS: Inspection, Semiconducting wafers, Scanning electron microscopy, Yield improvement, Defect detection, Information operations, Optical inspection, System on a chip, Data analysis, Manufacturing
Bijnan Bandyopadhyay, Jon Cheek, Robert Dawson, Michael Duane, Jim Fulford, Mark Gardner, Fred Hause, Bernard Ho, Daniel Kadoch, Raymond Lee, Ming-Yin Hao, Chuck May, Mark Michael, Brad Moore, Deepak Nayak, John Nistler, Dirk Wristers
A family of CMOS processing technologies used to produce AMDs fifth and sixth generation microprocessors (K5 and K6) is described. Some of the issues that arose during the technology development and the transfer to manufacturing are also presented. Transistor performance is compared to literature results and shown to be best in its class.
Conference Committee Involvement (3)
Data Analysis and Modeling for Patterning Control III
23 February 2006 | San Jose, California, United States
Data Analysis and Modeling for Process Control II
3 March 2005 | San Jose, California, United States
Data Analysis and Modeling for Process Control
26 February 2004 | Santa Clara, California, United States
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