Ms. Silvia Ahmed Profile

Silvia Ahmed

at Univ Stuttgart

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Proceedings Article | 15 October 2012 Paper

Parallel hardware architecture for JPEG-LS based on domain decomposition

S. Ahmed, Z. Wang, M. Klaiber, S. Wahl, M. Wroblewski, S. Simon

Proceedings Volume 8499, 849914 (2012) https://doi.org/10.1117/12.929650

KEYWORDS: Computer programming, Image compression, Clocks, Field programmable gate arrays, Image processing, Plutonium, Image sensors, Raster graphics, Multiplexers, Image quality standards

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JPEG-LS has a large number of different and independent context sets that provide the opportunity for par-allelism. As JPEG-LS, many of the lossless image compression standards have “adaptive” error modeling as the core part. This, however, leads to data dependency loops of the compression scheme such that a parallel compression of neighboring pixels is not possible. In this paper, a hardware architecture is proposed in order to achieve parallelism in the JPEG-LS compression. In the adaptive part of the algorithm, the context update and error modeling of a pixel belonging to a context number depends on the previous pixel having the same context number. On the other hand, the probability for two successive pixels to be in different contexts is only 17%. Thus storage is required for the intermediary pixels of the same context. In this architecture, a buffer mechanism is built to exploit the parallelism regardless of the adaptive characteristics. Despite the introduced architectural parallelism, the resulting JPEG-LS codec is fully compatible with the ISO/IEC 14495-1 JPEG-LS standard. A design for such a hardware system is provided here and simulated in FPGA which is also compared with a sequential pipelined architecture of JPEG-LS implemented in FPGA. The final design makes it possible to be applied with a streaming image sensor and does not require storing the entire image before compression. Thus it is capable of lossless compression of input images in real-time embedded systems.

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