Proceedings Article | 10 January 2005
KEYWORDS: Digital signal processing, Field programmable gate arrays, Clocks, Video, Signal processing, Nonuniformity corrections, Staring arrays, Infrared radiation, Thermography, Image enhancement
A 320×240-uncooled-microbolometer-based signal processing circuit for infrared focal-plane arrays is presented, and the software designs of this circuit system are also discussed in details. This signal processing circuit comprises such devices as FPGA, D/A, A/D, SRAM, Flash, DSP, etc., among which, FPGA is the crucial part, which realizing the generation of drive signals for infrared focal-plane, nonuniformity correction, image enhancement and video composition. The device of DSP, mainly offering auxiliary functions, carries out communication with PC and loads data when power-up. The phase locked loops (PLL) is used to generate high-quality clocks with low phase dithering and multiple clocks are to used satisfy the demands of focal-plane arrays, A/D, D/A and FPGA. The alternate structure is used to read or write SRAM in order to avoid the contradiction between different modules. FIFO embedded in FPGA not only makes full use of the resources of FPGA but acts as the channel between different modules which have different-speed clocks. What's more, working conditions, working process, physical design and management of the circuit are discussed. In software designing, all the function modules realized by FPGA and DSP devices, which are mentioned in the previous part, are discussed explicitly. Particularly to the nonuniformity correction module, the pipeline structure is designed to improve the working frequency and the ability to realize more complex algorithm.
