EUV Lithography is an important technology that drives semiconductor device miniaturization. It is currently undergoing high volume manufacturing (HVM) of 3 nm logic node and development of 2 nm node by leading-edge semiconductor manufacturers. EUV mask technology is becoming increasingly important factor for EUV lithography. Mask resolution requirement is under 25nm for 2nm node Technology node. DNP has developed the EUV mask process with using the low-sensitivity-high-resolution resist and multi beam mask writer (MBMW) and This process shows promising capability on the resolution for 2nm Logic technology. For A14 Technology need more high resolution mask, In this paper, we present a comprehensive study on mask processes that possess a resolution of 20nm or below and techniques aimed at enhancing lithography contrast.
In semiconductor manufacturing for the 3nm node, 2nm node and beyond generations, Extreme ultraviolet lithography (EUVL) is an essential technology, and within that, photomask technology plays an important role. Currently, photomasks for EUVL are manufactured with a multi beam mask writer (MBMW) that uses over 200,000 electron beams to achieve high efficiency and high precision. However, it is said that the chemical amplification resist for EB lithography has already reached its limit, and forming a 10nm pattern on a mask is extremely difficult. Last year, We reported mask development using Ultra High Resolution CAR resists. In this report, we present the latest mask development status using chemical amplification resists and alternative resists to achieve even higher resolution.
Nano-Imprint Lithography (NIL) is considered a promising alternative to optical lithography for technology nodes at
22nm hp and beyond. Compared to other advanced and complex lithography methods, NIL processing is simple and
inexpensive making it a widely accepted technology for pattern media and a potential cost effective alternative for
CMOS applications. During the NIL process, the template comes into direct contact with the resist on the substrate and
consequently template cleanliness plays a decisive role in imprinted substrate quality. Furthermore, if the template has
any form of a defect such as resist residue, stains, particles, surface scratches, chipping and bumping etc. it can lead to
poor quality imprints, low yield and throughput decreases.
The latest ITRS roadmap has stringent CD, CD uniformity, surface roughness and defect control requirements for NIL
templates. Any template cleaning process that is adopted must be able to remove defects while maintaining the critical
parameters outlined by the ITRS. Aggressive chemistries (such as NH4OH or SC1 (NH4OH+H2O2+DI) and strong
physical force treatments (such as MegaSonic & Binary Sprays) may cause damage to the template if not optimized.
This paper presents the cleaning chemical effects on template surface roughness and CD at varying concentrations. The
effect of physical force cleaning on fragile and sensitive pattern features is also presented. Particle & imprint resist
removal efficacy at different process conditions is compared.
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