In this paper, a timing control circuit for infrared detectors is designed based on JESD204B high-speed serial interface technology, and a corresponding verification scheme is proposed. The timing control circuit of the infrared detector consists of a JESD204B high-speed data transmission module and a control clock generation module, used for data transmission and control timing generation in the infrared detector imaging circuit. The timing generation module can adjust the register status through SPI to meet the timing requirements of multiple detectors; The data transmission module outputs high-speed serial data through two JESD204B transmission interfaces for 8-channel LVDS digital data according to the protocol, reducing the data interface with the main control circuit. The high-speed data transmission function is verified using a timing control circuit as the transmitter and FPGA as the receiver. The FPGA received the data correctly and met a serial data transmission rate of 4.096Gbps; Verified the function of controlling timing generation, the timing control circuit is based on the main clock and can correctly generate control signals for various modules inside the circuit.
According to the application requirements of airship-borne photoelectric payload, a low-noise miniaturized signal processing system for airship-borne multi-spectral infrared camera is designed and implemented. The system includes medium wave signal processing circuit, long wave signal processing circuit and integrated control circuit. High integrated design technology is adopted in medium wave signal processing circuit and long wave signal processing circuit to achieve high-precision bias voltage generation, low-noise analog signal conditioning, detector focal plane temperature monitoring, detector timing generation, image processing, data transmission. The size of each signal processing circuit is only 84mm×50mm×20mm. The integrated control circuit realizes the image data framing and encoding based on ARINC818 standard of the Avionics Digital Video Bus in FPGA, and sends the encoded high-speed digital video to the airship platform through optical fiber, which realizes the highly reliable and lightweight data transmission. After the introduction of the key technologies of each circuit, the experimental verification of the signal processing system for airship-borne multi-spectral infrared camera is carried out. The experimental results show that the design scheme of the signal processing system is reasonable and feasible. While realizing the miniaturization design, the system noise is lower than 0.3mV and the data transmission rate is up to 2.125Gbps, which meets the requirements of camera system.
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