Uni-processor and shared memory UMA multi-processor workstations are currently ubiquitous. The capabilities of such machines are commonly extended through the use of one or more application-specific coprocessors, located on the system expansion/peripheral bus, or a dedicated local bus. It is therefore considered worthwhile to investigate the limits of applicability of FPGA-based reconfigurable coprocessors when used to enhance such machines. In order to do this, it must be possible to estimate performance for coprocessor architectures that do not currently exist. This paper describes a method for generating estimates of performance for applications which make use of such reconfigurable coprocessors. By combining direct measurements on the target platform with model-based estimates and simulation data, estimates of performance can be synthesised which are accurate to better than +/- 5%.
KEYWORDS: Field programmable gate arrays, Image processing, Logic, Data storage, Photomasks, Detection and tracking algorithms, Signal processing, Multiplexers, Clocks, Computing systems
The ability of rapidly reconfigure the gate-level logic of SRAM-based FPGAs at run-time allows algorithm implementations to be both adaptive and highly application- specific. In this way, adaptive algorithms can be implemented in hardware, and deliver high performance with a flexibility not normally associated with an application- specific solution. This paper describes the static implementation and operation of an adaptive image- enhancement algorithm called SUSAN on a Xilinx XC4085XL, demonstrating order-of-magnitude performance improvements over optimized software running on high-end general-purpose processors, and discusses the implementation of adaptive solutions in both hardware and software. The effective use of dynamic reconfiguration for run-time reconfigurable systems based on XC4000-series devices is examined, along with the use of the JBits API for implementing FPGA-based adaptive signal processing algorithms. Both the performance and suitability of XC4000-series devices for adaptive processing are shown to be critically dependent on device capacity.
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