Micro-trenching occurs during plasma polysilicon etch for features with sub 0.5 micrometers spaces and thin gate dielectric. The trenches, which form near the base of etched features as a series of holes through the gate dielectric and into the underlying silicon, are the result of ion scattering off the resist/polysilicon sidewall. By studying structures with varying feature spacing and resist thicknesses we were able to determine that the depth and location of the trenches are related to the aspect ratio (height:width) of the structure, the sidewall profile of the resist/polysilicon line, and the process conditions during over-etch. Ion scattering which causes the micro-trenching is enhanced under conditions of increasing aspect ratio and decreasing sidewall angle of the etched feature.

Plasma etching of highly phosphorous doped polysilicon gate structures can yield undercutting of the poly lines creating a negative slope of the vertical edge of the polysilicon or a notching at the bottom of the lines. In order to achieve good step coverage of subsequent deposited oxides and to facilitate the removal of stringers during etching of a poly II layer in EEPROM structures, such a profile cannot be acceptable. This paper describes the development of a chlorine-based reactive ion etching (RIE) process that exhibits slightly positively sloped (85 degree(s) angle) profiles of the first polysilicon layer. Response surface methodology was used to identify most important process parameters and to characterize the final process. The results obtained at the different stages are presented in detail.

Specialized EPROM cell architectures lead to a host of new difficulties during pattern transfer. Results from patterning stacked gate structure multilayers of WSi_x, polysilicon, SiO₂ and Si₃N₄ with etching chemistries containing HBr and Cl₂ are examined. Strong effects arising from changes in feed composition and wafer temperature are discussed along with some basic mechanisms involved in these interactions.

Studies were conducted in a magnetically enhanced reactive ion etcher to understand the material and process related issues affecting polymer formation during a polysilicon etch. Samples consist of POCl₃ doped and undoped polysilicon which are patterned with two different types of photoresist. Processing is done using a Cl₂/HBr chemistry with some of the experiments having oxygen added during the over etch step of the process. Scanning electron microscope results indicate two very distinct structures exist on the various samples. One that exhibits a more uniform polymer and the other that leaves an `ear' shaped polymer formation. These various structures also are analyzed using x-ray photoelectron spectroscopy. This analysis indicates the polymers to be a combination of silicon, oxygen, and carbon. Based on this study it is apparent that the type of material, photoresist, and process variables significantly influence the polymer formation during the etching of undoped and doped polysilicon with an HBr/Cl₂ chemistry.

A high aspect ratio (> 15:1), sub-micron, deep capacitor trench process is demonstrated in an 8 inch Applied Materials P5000E magnetically enhanced reactive ion etcher (MERIE) using HBr/NF₃/He-O₂ chemistry. Through the insertion of ferro-magnetic sheet material into the pedestal, sub-micron trenches can be etched to depths greater than 10 micrometers , with etch rates > 6000 angstroms/min, uniformity < +/- 5%, profile uniformity 89 +/- 0.5 degree(s) and selectivity to oxide > 40:1. The importance of the wafer surface temperature on trench etch properties is established. Studies indicate that there is a threshold temperature below which the chosen recipe would need to be modified to produce satisfactory trenches.

Water vapor added hydrogen gas is discharged by microwave. Concentrations of hydrogen atoms are measured in the plasma by actinometry and in the downstream by electron spin resonance (ESR). When water vapor is added to hydrogen gas, the concentration of hydrogen atoms in the plasma increases to an amount three times greater than that of pure hydrogen gas and the concentration in the downstream increases to an amount 90 times greater. When hydrogen gas without water vapor is discharged, the concentration of hydrogen atoms decreases just after the discharge is turned on. When water vapor is added to hydrogen gas, however, this time dependence of hydrogen concentration is not observed.

A semi-integrated SOG/TEOS planarization process for intermetal dielectric (ILD) has been developed in the CVD cluster system Precision 5000 (Applied Materials). The process consists of SOG etch back performed in one chamber immediately followed by plasma TEOS deposition in another chamber of the system, to reduce particle contamination and moisture adsorption in the SOG film. The main goal of the work was to develop an etchback process with very low SOG/TEOS selectivity (i.e., 0.7:1) and good etch uniformity, suitable for VLSI planarization requirements. The results of the parametric process characterization performed with the CHF₃/CF₄/Ar chemistry and the very satisfactory defectivity levels obtained for interconnections and intermetal oxide, for contacts leakage and capacitor breakdown are reported. Special emphasis has been devoted to the study of the oxide interface after the etchback to correlate the probable surface modification to the `peeling' effect evidenced on the TEOS film. The advantages of using Ar sputter to solve the adhesion problem are then discussed.

Ion-implanted photoresist is known to be difficult to remove using plasma ashing because of its carbonized top layer. After ion implantation, heating of the wafer substrate in ashers can cause resist popping if the temperature exceeds the implantation bake temperature. This paper presents chamber contamination measurements following ashing of implanted photoresist. Among the four implant species tested, boron resulted in the most severe resist popping. Higher implant dose, energy, and ashing temperature also caused more popping of the resist. In general, more severe resist popping during ashing caused more residues to be left on subsequent wafers put through the chamber. The type of asher had a large effect on redeposition of residues on subsequent wafers.

In CMOS technology for highly integrated circuits, TiN serves as a diffusion barrier layer between the Si substrate and the Al metallization. Structuring the TiN is a challenge as the selectivities of the etching process have not only to be high against resist and SiO₂ but also against the gate and S/D materials. For quarter micron devices with shallow p/n junctions this material can be a salicide, e.g., CoSi₂ or TiSi₂. To address the described requirements, a TiN etch process employing HBr chemistry has been developed in a triode system with magnetic confinement. The reactor concept leads to relatively high ion densities, which allows anisotropic etching at low pressures (5 m Torr) with reasonable TiN etchrates of about 150 nm/min. Selectivities to SiO₂ of 5:1 could be obtained. In comparison to Cl₂ chemistry the selectivities to photoresist are with 1.5:1 twice as high and allow longer over-etch. Using experimental design software, an optimization with respect to underlying CoSi₂ resulted in a selectivity of nearly 10:1 with the drawback of a reduced TiN etchrate. Using the optimized recipe sub-half micrometers TiN structures over high topography have been patterned. The problem of residue removal after resist stripping is discussed.

This paper describes a new method for etching rate and resist profile control in O₂RIE. The method simply determines the equivalent process conditions for different device layers with various areas of the material to be etched (etchable area) by introducing the ratio of the etchable area to the flow rate defined as S/F parameter. The concept of this method is that the gas composition controlled by S/F parameter determines both the etching rate and the resist profile under the constant energy flux densities of ions and energetic neutrals (ion impact density). S/F parameter is introduced through the extended expressions of Mogab's loading effect theory by applying two important characteristics in O₂RIE: (1) The dominant etchant is oxygen molecules. (2) The etching rate is proportional to the ion impact density. The etching rate and the gas composition are expressed as functions of S/F parameter and the ion impact density in the extended expressions. The etching rate and the resist profile have been controlled by applying this method to wafer samples with various etchable areas. Furthermore, a linear relationship between the etching rate and the resist profile is clarified.

We have studied the relevant parameters involved in the dry development of silylated polymers. In particular the influence of substrate temperature, ion energy, and atomic oxygen concentration is investigated. Critical dimension loss is demonstrated to depend upon silylation angle, sputtering rate of the silylated polymer, and development time. Anisotropic etch profiles are argued to be due to a compromise between critical dimension loss and isotropic etching of the unsilylated polymer. Improvements of the process are suggested.

The concept of field-assisted etching is developed. Numerical solution is obtained for the equilibrium flux of negative halogen ions through a thin (h <EQ 10 angstrom) buffer layer of reaction onto the surface of silicon of various bulk dopings. Results of the numerical simulation are compared with the experimental data.

The two-dimensional, axisymmetric model of a bounded, partially ionized, magnetized glow discharge plasma is presented. The model treats positive ions as particles and electrons as a fluid in a hybrid configuration. The results reported here are directed towards simulating an electron cyclotron resonance (ECR), microwave-sustained plasma. Results include predictions of plasma density and potential, electron temperature and ion flux and energy. Models such as the one presented here have the potential to be used by plasma process engineers and plasma tool designers.

A new on-line control method of within-a-wafer uniformity for single wafer processes is presented. The method aims to reduce the risk of applying on-line control of the uniformity by categorizing the process variabilities into tunable variability and non-tunable variability. The non-tunable variability is optimized off-line and the tunable variability is controlled on-line. According to the effects of process parameters on the process variabilities, the process parameters are grouped as robustness factors, tuning factor, and adjustment factor. The use of properly selected tuning factor and adjustment factor reduces the risk of undesirable effects of on-line control. The method is applied to the oxide etch process using a LAM AutoEtch 590 single wafer plasma etcher. On-line control improved the within-a-wafer uniformity ((sigma) /(mu) ) by a factor of two over the uncontrolled within-a-wafer uniformity.

We focus on discussing a method to reduce the self-bias voltage and applying this method to a plasma etcher to improve reduction of ion damages. We have developed a technique that can reduce the self-bias voltage without disturbing the main plasma by using a supplemental electron flow from the powered electrode to the plasma through the sheath. We have concluded experimentally that the effects of the supplemental electron flow on the main plasma parameters is not serious and damage induced to films is reduced considerably. The experiments were carried out in an rf discharge chamber. It may be certain from the results that the disturbance on the plasma parameters created by the variable self-bias voltage is minimal. The damage to the films induced by its ion bombardment is reduced by approximately one-half, when the self-bias voltage was controlled from -120 V to -98 V.

The quantities of the gate damage in an ECR plasma are evaluated as charge-up gate currents with the technique which employs Al gate MOS diodes and their sensitive flat band voltage shifts with current stress. A general model for charge-up damage is proposed. A charge-up I- V characteristic in the ECR plasma is estimated applying this technique, showing good agreement with that derived from the model. It is also deduced that the same I-V of the test device as the real device is essentially required for the correct evaluation. In a barrel reactor damage, antennas do not show the simple current collecting effect which has been expected.

The nature of the dry develop process demands controllable ion energies for good etch selectivity, a large highly directional ion flux for good anisotropy, and a clean etch. As a part of the plasma characterization, the plasma density, the resist etch rate, the ion energy and the ion energy flux have been determined as a function of process conditions, for an inductively coupled plasma (ICP) source. The plasma density and ion flux increase linearly with antenna power. A factor of four variation in ion to neutral flux ratio could be achieved over the rage of flow rates and power levels investigated. Independent control of the etch rate and selectivity is possible with the ICP system. However, eddy current heating of the wafer at high power levels causes loss of anisotropy. Feasibility of using an ICP for the DESIRE process is demonstrated. Good pattern linearity can be achieved for feature sizes ranging from 0.35 - 0.60 micrometers . The process latitude for the exposure time, silylation time, and etch conditions is wide. The etch is clean, exhibits good anisotropy, and no proximity effects. The ICP etch system is an attractive choice for sub half micron patterning using DESIRE.

Etching of patterned doped poly-Si and of patterned W or Al metal wafers with high selectivity, high anisotropy, and high rate is achieved using the newly developed MORI rf plasma source. The source operates at low pressure (typically 1 - 3 mtorr) and at 13.56 MHz while achieving high efficiency through the generation of an m equals 0 Whistler wave often referred to as the m equals 0 helicon wave. The chlorine etch selectivity of poly-Si to SiO₂ can exceed 100, the selectivity of poly-Si to photoresist can exceed 10, and the poly-Si etch rate ranges from 2500 A/m to about 4000 A/m, depending upon wafer characteristics. The uniformity is less than 2% (1 sigma) and the chlorine ion saturation current exceeds 15 mA/cm² above the wafer location. Uniform, anisotropic etching of Al-1% Si-0.5% Cu using pure Cl₂ or Cl₂-(5-20%) BCl₃ at 1.5 - 3 mtorr achieves rates exceeding 6000 A/m with selectivity to photoresist (PR) of 9 and selectivity to oxide of 22 using a wafer rf bias power of 30 w at 13.56 MHz. Similarly excellent results are found in the etching of patterned W using SF₆ at 3 mtorr. Etch rates exceed 2500 A/m with selectivity to PR greater than 2 and selectivity to oxide greater than 10.

ULSI oxide etch requirements present a fundamental challenge which cannot be easily overcome with existing oxide etch technology. The principal issue is to provide a wide process window which simultaneously provides; high etch rate with good uniformity, high selectivity with minimal microloading, anisotropic profiles on high aspect ratio structures and all achieved under low damage etch conditions free of device degradation. This paper introduces an innovative application of inductively coupled rf technology which demonstrates a low pressure high density plasma (HDP) etch process, capable of meeting the oxide etch requirements of 0.35 micrometers device technology and beyond. Evidence is also provided of a newly characterized low fluorine polymer (LFP), which forms during the etch process providing anisotropic profiles on high aspect ratio structures and selectivity to a range of substrate materials.

The prospects for computer aided design (CAD) tools for use in designing plasma etchers and plasma processing systems are discussed. Accurate numerical models of etching and film- depositing plasmas are becoming available, so that the main limitations on modeling are increasingly due to lack of cross-section and other similar data. These plasma models must still be validated, however, not just against each other but quantitatively or qualitatively against experiment. CAD tools will very probably consist of several modules, such as a plasma module, a plasma-chemistry module, and a surface module. The coupling of the modules amplifies errors, increasing the need for precision. The state of available calculation techniques is considered, emphasizing the way we have created a flexible framework for setting up and combining numerical tools, to minimize time and errors in developing simulations.

A transformer coupled plasma (TCP) source has been developed for use in the etching of polysilicon films. The TCP is a planar, inductive source which can achieve high density operation (> 10¹² cm^-3) over a large pressure range (1 - 100 mT). The etching characteristics of this source are described and process trends for etch rate, selectivity, and profile microloading are presented. Process requirements for polysilicon films with sub- half micron features are achieved using the TCP source by separately controlling the plasma parameters and the wafer bias.

A parametric study of the pattern transfer step in a trilevel resist system using oxygen-based plasmas has been made using a distributed electron cyclotron resonance reactor with independent rf biasing. In pure oxygen plasmas, critical dimension loss is always present in the O₂ pressure and ion bombardment energy ranges investigated. The mechanisms most likely to be responsible for these defects during the pattern transfer process are presented and discussed. Perfect anisotropy can only be obtained at substrate temperatures below -60 degree(s)C. A novel plasma etching process based on sidewall passivation by sulfur is proposed using SO₂/O₂ mixtures. Perfect anisotropy without critical dimension loss is obtained at room temperature by using an 80% SO₂/20% O₂ mixture and a moderate ion bombardment energy. The ultimate resolution using this new plasma process in conjunction with deep UV exposure and a phase-shift mask is presented.

This paper discusses microwave absorption around the electron cyclotron resonance (ECR) region in relation to the magnetic field profiles and microwave conditions, and shows how to achieve stable, uniform, and efficient microwave absorption in an ECR plasma to prevent the instability. A high-performance multi-coil system and a new microwave introduction method developed for stable plasma generation are described. Experimental results show that sufficiently precise patterning suitable for practical use is achieved.

The measurement of pattern integrity is performed as a part of process control in all wafer manufacturing environments. Typically this measurement is performed off-line on pilot material using a top down scanning electron microscope (SEM). With the advent of sub- micron geometries and small lot wafer fabrication centers, it has become important to monitor the processes on a wafer by wafer basis. An in situ technique using diffraction grating test patterns has been used to monitor the pre-etch and post-etch linewidths on a polysilicon etch chamber. The technique is capable of linewidth measurements to 0.25 microns with pitches as small as 0.7 microns. A comparison of the in situ polysilicon linewidth measurements with off-line SEM measurements shows measurement differences of less than 10% indicating a measurement accuracy on that order. The repeatability of the diffraction technique is shown to be approximately 0.01 micron in comparison to the typical SEM repeatability of 0.025 micron.

Remote, noncontact temperature monitoring of semiconductors may be achieved by near infrared reflection spectroscopy of a wafer during processing. A technique is described which relies on the temperature dependence of the optical absorption edge characteristic of most semiconductors in conjunction with internal reflection at the interface between the wafer bulk and the vacuum/dielectric/device. Results are presented which demonstrate application of the technique to silicon wafers with a broad range of back surface properties such as single and double layer dielectrics. The measurements were carried out in situ during process in both a PVD metallization chamber and a plasma etch chamber, over the temperature range from 20 to 570 degree(s)C.

A polarization modulated spectroscopic ellipsometer (SE) is used in situ to measure the thicknesses of films in real time during processing. These thicknesses are used for adaptive control during single-wafer processing. Using the speed of phase modulation, multichannel detection, and digital signal processing techniques, this ellipsometer is capable of acquiring spectra in less than 75 ms. Efficient algorithms were developed for determining layer parameters (thicknesses and composition) from the measured spectra of multilayer film stacks in one second or less. The measured thicknesses and etch rates are used to anticipate interfaces in multiple layer stacks and control process end points. A repeatability gauge study was performed using this in situ SE and a commercial single-wavelength ellipsometer (SWE) on thermally grown silicon dioxide on silicon wafers. Data was obtained on each instrument over an oxide thickness range from 60 to 250 angstroms. The total repeatability for the in situ SE measurements was 0.26 angstroms (1.6 angstroms 6-sigma) over this thickness range.

We have investigated the possibility of using current and voltage measurements for real-time monitoring and control of radio-frequency discharges. Specifically, we have equipped a gaseous electronics conference (GEC) rf reference cell with a computer-controlled measurement system that samples the voltage and current waveforms at the cell power input and Fourier analyzes these waveforms to obtain the amplitude and phase of their fundamental and harmonic components. The system accounts for errors introduced by the stray impedance of the cell, yielding corrected values that more accurately reflect the values of voltage and current at electrode surfaces in contact with the plasma. These corrected values are monitored to reveal changes in fundamental plasma parameters such as sheath voltages, sheath fields, and sheath (dark space) thicknesses. Furthermore, the corrected values serve as better control parameters than the raw values of voltage, current or power, measured externally. The time required for the acquisition and analysis of a pair of current and voltage waveforms is approximately one second, making these measurements suitable for real-time sensing and control applications.

A closed-loop temperature control system has been developed for use in a low-temperature (-135 degree(s)C) plasma etch system. The system employs an optical fluorescence probe on the chuck (a second probe monitors the wafer temperature as well) to provide feedback to the heating element on the input line of the chuck closed-loop coolant fluid. A simple proportional-integral-derivative (PID) controller with a learn mode controls the rate of current pulses applied to the heater. Innovations include the direct measurement of chuck temperature for the control signal, and the coupling of large cooling and heating capacities in close proximity to the chuck along with a fast fluid flow to guarantee quick response. The system has been tested in prolonged etch runs of many wafers. It provides reliable, tight temperature control (3(sigma) as low as 0.6 degree(s)C). This level of control is significantly tighter than could be achieved by merely monitoring chiller bath temperatures.

Advance cell structures present in high-density memories and logic devices require high quality, ultra thin dielectric and conductor films. By controlling the interface properties of such films, remarkable process control enhancements of manufacturing proven, vertical LPCVD and oxidation processes are realized. To this end, an HF/H₂O vapor etch reactor is integrated in a vacuum cluster tool comprising vertical reactors for the various LPCVD and oxidation processes. Data of process control improvement are provided for polysilicon emitters, polysilicon contacts, polysilicon gates, and NO capacitors. Finally, the cost of ownership of cluster tool use is compared with that of stand-along equipment.

The use of CVD tungsten for filling of contacts and vias has been reported in many multilevel interconnection technology applications. W-stud formation is done by blanket tungsten deposition and subsequent either etchback or chemical-mechanical polishing (CMP). This paper presents the integration of both tungsten deposition and etchback processes in a commercial cluster tool, as compared to W-stud formation by CMP. Tungsten films were deposited at a high pressure of 70 Torr to fill high aspect ratio (3.5) contact holes without voids. Tensile stress of 10E9 dynes/cm² measured for these films was higher by almost a factor of 2 than the low pressure tungsten films deposited at 0.85 Torr. A composite W film, deposited by both high and low pressure regime, has been utilized to have both advantages of via-filled characteristic and low film stress. A multistep RIE process had been used with the majority of W removed using a SF₆/Cl₂ plasma and the remaining W was then removed with Cl₂/O₂ to minimize the microloading phenomenon. The maximum W- plug recess, observed at the edge of the wafers, is only 0.1 micrometers . Electrical test results of W contact studs formed by clustered processes are compared to W-stud formation by CMP.

A multi-process chamber has been developed for ashing of photoresist. Using microwave downstream and RIE processing, ashing processes have been developed which result in residues soluble in DI water, bypassing the need for solvent or acid treatment.

A design of experiments methodology was used to evaluate seven different types of gate stack cluster tool configurations and their associated economic performance. SEMATECH's Cost of Ownership, Cost/Resource, Generic Dual, and Batch Cluster Tool Models plus ManSim and RS/1 were used. Response surface methodology (RSM) was utilized to predict and optimize the tool's configuration and economic performance parameters against three independent factory strategies. These strategies were: minimize cost per chip, minimize process cycle time, and increase capital utilization and flexibility. As expected, the single wafer tool configurations produced the lowest process step cycle times. Results also indicate that for a single wafer processing tool (at a cost of $1.2 M) to be economically viable (in terms of COO) as an alterative to the conventional approach, process times (per wafer, per chamber) of less than five minutes must be achieved. The batch cluster tool configuration with one pre-clean, gate oxide and poly chamber each was the best method to increase capital utilization and flexibility. This methodology can be applied to any process tool evaluation and can prove useful in designing and improving the tools's performance in order to meet factory goals.

The hole carrier concentration of heavily carbon doped GaAs epilayers (4.7 X 10¹⁹ and 9.8 X 10¹⁹ cm^-3) was increased and the mobility and lattice parameter were decreased by rapid thermal annealing silicon nitride capped samples at temperatures from 500 to 900 degree(s)C. For the more heavily doped sample, the hole concentration, mobility, and lattice mismatch decreased with increasing annealing temperature for annealing temperatures higher than 700 degree(s)C, but the hole concentration and mismatch were still larger than those of the as grown samples. Two heavily carbon doped InGaAs samples (2.35 X 10¹⁹ cm^-3 and 2.05 X 10¹⁹) with low In mole fractions (1% and 8%) were furnace annealed with or without silicon nitride caps in H₂ containing 0.3% AsH₃ over the temperature range 500 - 800 degree(s)C. The changes observed for the capped samples were similar to those observed for the RTA annealed GaAs films, but for the uncapped samples the changes in the carrier concentration, mobility, and lattice parameter were for the most part much smaller. The only exception is the large increase in the lattice parameter at the highest annealing temperatures in the films containing 1% In. SIMS results showed that annealing produced no change in the C concentration or distribution, but the hydrogen concentration decreased in all samples except the uncapped films annealed in AsH₃. We attribute the low temperature (<EQ 700 degree(s)C) results in all but the uncapped samples annealed in AsH₃ to the removal of hydrogen which had passivated the carbon acceptor.

Application of spectroscopic phase modulated ellipsometry (PME) to study both ultrafast and slow processes of interaction of silane (SiH₄) with thin film Pd, and to the investigation of the growth kinetics of a-Si:H films deposited by rf glow discharge under UV light irradiation are presented. As compared to other ellipsometric techniques like rotating analyzer ellipsometry (RAE), the phase modulation uses a high frequency of about 50 kHz provided by a photoelastic modulator. Thus, PME allows one to reach 1 - 5 ms time resolution which permits faster real-time measurements than RAE. This remarkable feature of PME makes it particularly suitable for in-situ applications. Changes of optical properties of Pd thin films exposed to SiH₄ at different fluxes are monitored by in situ single wavelength ellipsometry in the case of high fluxes which lead to ultrafast process and by in situ spectroscopic ellipsometry at small fluxes and slow kinetics. The study reveals a complicated character of the process which depends on initial flux of silane and leads to formation of Pd disilicide, Pd hydride, and an intrinsic porosity. A qualitative model of the process is proposed.

The development of a 16 Mb DRAM capable, deep trench etch in an applied materials P5000E, 200 mm, reactor is discussed in this paper. In order to meet the stringent device requirements extensive system modification, better process control tool development, and process optimization were necessary. The system modification activities have included: (1) a monopolar electrostatic chuck in place of the normal mechanical clamp to reduce trench profile tilt at the wafer edge, (2) an increase in cathode size, and (3) magnetic field modification. Both (2) and (3) improved the trench etch rate uniformity. For better process control, a blue laser diffraction etch rate monitor system has been demonstrated for 0.8 micrometers X 4 to approximately 7 micrometers 16 Mb trenches using two chemistries, HBr/SiF₄/He-O₂ and HBr/NF₃/He-O₂. By means of process optimization, both HBr/SiF₄/He-O₂ and HBr/NF₃/He-O₂ chemistries are able to meet the requirements for 16 Mb trench.